In general, a power transistor in a semiconductor integrated circuit requires a large current. For this reason, as is illustrated in the circuit of FIG. 1, at least two transistors are assembled in a semiconductor substrate, which have the respective emitter electrodes, base electrodes and collector electrodes connected in common by interconnection layers, and they are used as if they were a single power transistor.
As is well known, a power transistor is a transistor which can withstand a high output, so that the structure inevitably becomes large in size. The width of the interconnection layer formed on the surface of the semiconductor substrate is consequently large.
The power transistor has electrodes extending on an emitter layer, a base layer and a collector layer as fully as possible and the edges of opposing electrodes are long in order to prevent the current crowding between adjacent electrodes on the emitter layer, base layer and collector layer so as to enable the power transistor to supply a larger output. This current crowding causes a secondary breakdown which leads to the destruction of the power transistor.
Accordingly, the area occupied by the interconnection layers is large in the semiconductor integrated circuit in which a power transistor fabricated by the use of a single-layer electrode interconnection technique is assembled as above.
Indeed, the area occupied by the interconnection layers is approximately twice as large as that of the regions in which the emitter layer, the base layer and the collector layer was formed.
A great hindrance to the enhancement of the density of integration of a semiconductor integrated circuit that, in addition to the large area of the power transistor itself, as described above, has been the formation of such interconnection layers, so the area becomes larger.